Computing Symbolic Expressions in Analog Circuits Using Nullors

A novel method is introduced to compute symbolic expressions in analog circuits modeled by nullors. The proposed method is based on the formulation of a compact system of equations (CSEs) by manipulation of data-structures, which highly improves traditional symbolic-methods. It is demonstrated that by modeling all active devices using nullors, the CSEs is easily formulated by manipulation of both the nullor and admittance interconnectionrelationships. Several examples leads us to conclude on the suitability of the proposed symbolic-method to be incorporated within a symbolic simulator.